Modelling of nanoscale MOSFET performance in the velocity saturation region

Abstract

Velocity saturation as a function of temperature and drain voltage for n-channel MOSFET is investigated. The combination of an existing current-voltage (I-V) model, drain source resistance model and a more precise mobility derivation gives an accurate representation of velocity saturation as a function of the above parameters. A simplified threshold voltage formulation is developed to provide similar accuracy when compared to actual devices. The models show good agreement with the experimental data over a wide range of gate and drain bias for 90nm process technology.