Optimal voltage sag monitor placement in power system by analyzing monitor reach area and sag severity index

Abstract

Voltage sag is one off severe power quality issues. Its effect can cause huge losses to industries which using sensitive equipment like microcontroller and computer. To minimize these losses, industrial customers need to understand how power quality is impacting their system and how to mitigate its effects. Voltage sag happens frequently and it causes by random and unpredictable factors. So, the voltage sag monitoring system should able to monitor the whole power system but to place voltage sag monitor at all buses is not economic. Objectives of this studied are to find the optimal number and placement of voltage sag monitors in IEEE 30- bus system. In proposed method, first, the concept of monitor reach area has been used. In this studied, voltage sag was represented by balance and unbalance fault with fault impedance, Zf equal to 0Ω. IEEE 30 bus system was constructed on PowerWorld software in order obtained fault voltage on every bus. Then, monitor reach area matrix was formed by comparing fault voltage with selected voltage threshold,α. After that, monitor reach area was analyzed by using Branch and Bound method to find minimum number and all possible arrangements of VSM. Finally, to optimally place the identified number of VSM, all possible combinations of those VSM in the power system are evaluated using sag severity index. The proposed algorithm has been implemented and tested on the IEEE 30-bus test systems to show effectiveness of the proposed method in finding the optimal voltage sag monitor placement in power system. The proposed method has been tested with 2 different α which are 0.55 p.u. and 0.80 p.u. respectively. The proposed method successfully found the optimal number and its placement for monitoring the whole IEEE 30 bus system with respective α value. Based on result, for α equal to 0.55, VSM need to be installed on bus 6, 17, 25 and 30 to monitor voltage sag on IEEE 30 bus system and for α equal to 0.80 p.u., VSM only need to be place at bus 25 for monitoring voltage sag on the test system.