Iterative diagnosis to improve diagnostic resolution

Abstract

The area of research is the study of iterative diagnosis. Diagnosis to find faults in semiconductor devices is a well researched field, with most logic diagnosis efforts using the inject-and-evaluate algorithm. However, most diagnosis tools are unable to resolve faults to a single gate/device. Because of this, fault isolation (FI) engineers are forced to use probing techniques such as IREM logic state imaging (LSI) in order to further isolate the fault to the gate/device level before performing failure analysis. The current method of selecting probe sites is simply to take the list of fault candidates and probe them sequentially or by determining the optimal probe order through manual analysis of the circuit cone. However, in cases where a large list of fault candidates are returned by the diagnosis tool, it is difficult to manually analyze the fault cone as it is too large and complex. This work implements a basic algorithm which allows the diagnosis tool to recommend probe candidates, read in the result of the probe, and continue this cycle iteratively until the fault is fully isolated to a single gate/device. The algorithm is based on a binary search, and shows that a 5-6X reduction in the amount of probing needed can be achieved if the diagnosis tool is used iteratively in the fault isolation flow.