Kua , Wee Soo (2011) FPGA implementation of bipartite graph matching algorithm. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
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Item Type: | Thesis (Masters) |
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Additional Information: | Thesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Sistem Mikroelektronik)) - Universiti Teknologi Malaysia, 2011; Supervisor : Dr. Nasir Shaikh Husin |
Subjects: | Unspecified |
Divisions: | Electrical Engineering |
ID Code: | 32104 |
Deposited By: | Kamariah Mohamed Jong |
Last Modified: | 12 Jun 2013 07:54 |
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