Micro-sequencer based control unit design for a central processing unit

Abstract

Central Processing Unit (CPU) is a processing unit that controls the computer operations. The current in house CPU design was not complete therefore the purpose of this research was to enhance the current CPU design in such a way that it can handle hardware interrupt operation, stack operations and subroutine call. Register transfer logic (RTL) level design methodology namely top level RTL architecture, RTL control algorithm, data path unit design, RTL control sequence table, microsequencer control unit design, integration of control unit and data path unit, and the functional simulation for the design verification are included in this research.