Task migration optimization for improved dark silicon many-core systems performance under thermal constraint

Abstract

Contemporary thermally-constrained techniques for optimizing dark silicon many-core system performance do not use dynamic thermal management efficiently and do not consider the wake-up latency of dark cores. This thesis proposes two improved techniques to overcome these limitations. First is a dynamic thermal-aware performance optimization (DTaPO) technique for dark silicon many-core systems. DTaPO optimizes dark silicon many-core system performance under thermal constraint. The proposed technique utilizes both task migration and dynamic voltage frequency scaling (DVFS) to optimize the performance of a many-core system while keeping the system temperature at a safe operating limit. Task migration puts hot cores in lowpower states and moves tasks to cool dark cores to aggressively reduce chip temperature while maintaining high overall system performance. To reduce task migration cold start overhead during task migration, source cores keep their level-2 cache content accessible to the destination cores. Moreover, task migration is limited among cores sharing the last level cache. In the case where task migration cannot be used due to no cool dark core destinations being available, DVFS is used to gradually cool the hot cores by reducing their frequency. Second, a prediction-based early wake-up (PEW) technique for dark cores is proposed to reduce the impact of dark core wake-up latency during the task migration process. An online sliding window-based ridge regression is used as the prediction model. In real-time, the prediction model uses the previous thermal, power, and core status (i.e., active or dark) to predict the subsequent temperature of each core . If task migration is expected to be used in the next control period, PEW puts the dark cores in a power state with low wake-up latency. Thus, it reduces the time needed by the dark cores to start running the migrating tasks, which improves the many-core system’s overall performance. Experimental results show that DTaPO improves the system’s performance by up to 80% compared to the Optimal Sprinting Patterns technique and reduces the temperature by up to 13.6 °C. Moreover, the comparison results show that the proposed PEW reduces the application execution time by up to 7.9% and 4.1% compared to DTaPO and the fixed-threshold wake-up (FEW) technique, respectively. It also shows that the proposed PEW increases the energy-efficiency by up to 5.5% and 2.3% MIPS/W over DTaPO and FEW, respectively.