Non-volatile flash memory characteristics implementing high-k blocking layer

Abstract

An Erasable Programmable Read Only Memory (EPROM) is a special kind of memory chip, that can retain the memory even when the power is turned off. This type of memory is known as non-volatile memory (NWM) cell. An EPROM, as a non-volatile memory is widely accepted for its excellent reliability and data storage capability for a large scale of time without noticeable data degradation. It is an implementation of floating gate charge storage system, where a conductive polysilicon layer traps electrons and shifts the threshold voltage. But research on EPROM has become very insufficient recently due to its poor memory characteristics and bulky size. To overcome this issue, an implementation of high-k as a blocking layer of an EPROM instead of SiO2 is proposed. The proposal includes the reduction of size by using split floating gate, which was applied in FinFET device structure. The best highk material (Si3N4, HfO2, and ZrO2) are implemented in this work and floating gate structure is chosen based on the literature review studies and applied on the EPROM to yield its excellent retention characteristics with better memory window. The dependency of EPROM characteristics and high-k blocking layer is also hypothesized, complemented with its physical and tunneling model. The EPROM device has been simulated using Silvaco TCAD Tools. An EPROM with high-k blocking layer shows much improvement in memory characteristics compared to conventional SiO2 blocking layer. It shows that, the relationship between k value and memory window is in exponential behavior. The higher the k value, the larger the memory window obtained. The proposed device shows 5.6V of memory window which is 3 times larger than the existing devices. For the reliability, almost no retention degradation after 10 years of extrapolation, which is about 50% improvement than existing devices. These improvements also have been validated with the literature review.