A matrix inversion hardware architecture based on Gauss-Jordan elimination for MIMO applications

Abstract

Digital Communications require faster and more dedicated electronic plat-forms to satisfy its real time performance. Highly computational algorithmic kernels can create a bottleneck to the systems where it is implemented on, due to the time it take to provide outputs, which reduces the throughput of the overall communication system. Fully Dedicated Hardware Architectures provide solutions to the speed crisis, since they provide the ability of performing parallel computations. Matrix Inversion is a complex algorithm that is implemented in MIMO systems. Since software solu-tions are not fast enough to satisfy the speed requirements, hardware solutions stood up to the challenge. In this project, a fully dedicated hardware architecture to find matrix inversion using Gauss-Jordan Elimination algorithm is presented, complex arithmetic operation is performed to match the nature of the elements of estimated propagation matrix in MIMO systems. The design is parameterized and universal for any complex matrix. Developing the design was done using SystemVerilog HDL, while simulation was done through Altera ModelSim. Software kernels were done on MATLAB for comparison purposes. The proposed architecture performance shows its advantage over software based kernels. Further comparisons have been done with previous designs for a variety of matrix sizes.