Analysis and performance evaluation of a fault-tolerant multistage interconnection network

Abstract

A single error occurs in the non fault-tolerant Multistage Interconnection Networks (MINs) render a catastrophe to the MINs. The new scheme is to design a fault-tolerant MIN. Multiple paths between an input port and output port in the proposed network are established by chaining switching elements which have the same partition in the same stage. To enhance the performance and reliability of the proposed switch, sub-switches are straddled across the stages in the proposed network. This thesis examines the performance and design issues of fault-tolerant MINs. It first presents a survey of the current state of the art in MINs. Then, it investigates one of the most important design issues: cost-effectiveness. Following this comprehensive study, the thesis proposed a fault-tolerant MIN model. Analytical models for evaluation of the proposed network survivability and performance are presented. Finally the thesis presents fault-diagnosis methods to locate possible single fault occurs in the proposed network. Because maximum alternatives paths in the network are exploited, the proposed fault-tolerant switch has long lifetime and high bandwidth. Compared to other switches, it performs better in term of cost-effectiveness and throughput. In conclusion, we have successfully developed a fault-tolerant MIN which is: high survivability, simple control algorithm, full connecting capability and high bandwidth.