Hardware-based genetic algorithm implementation in field programmable gate arrays

Abstract

Genetic Algorithm (GA) is inspired by natural selection and evolution in a computer program. It has been shown to be effective in solving search and optimization problems. However, research has shown that software implementations of GA in complex problems usually lead to unacceptable optimization delays. Hence, hardware-based GA solutions are needed, especially in systems that require real-time performance. However, full hardware implementation of GA eliminates its flexibility to be reused in other applications. This is because some of the GA operations are highly problem-dependent. Consequently, this thesis proposes a hardware-based GA (HGA) that provides configurability, scalability and flexibility. The proposed reconfigurable HGA is implemented on Altera Stratix II EP2S60 FPGA prototyping board with a clock frequency running at 50 MHz. Hardware-software co-design technique is applied. The system partitioning is done based on the following aspects: (a) system constraints (b) compute-intensive operations (c) sequential operations (d) bottlenecks during system bus access (e) logic cost, and (f) ability to reconfigure. In this work, the HGA is deployed in a number of test case studies, which include optimization of a simple fitness function, a complex Michalewicz’s function, and a real-world finger-vein image processing application. The real-world problem is to apply the GA to optimize the tuning of parameters in a finger-vein image processing biometric subsystem. Experimental results show that the proposed HGA achieves a good degree of configurability and flexibility in handling a variety of problems. The HGA is about three times faster compared to its software equivalent. The equal error rate of the finger-vein biometric system is improved from 1.004% to 0.101%. This shows that the proposed design is capable to optimize the tuning of the parameter set in this image processing application.