Universiti Teknologi Malaysia Institutional Repository

Design for testability II: from high level perspective

Chia, Yee Ooi and Paraman, Norlina (2008) Design for testability II: from high level perspective. In: Advances In Microelectronics. Penerbit UTM, Skudai, Johor Bahru, pp. 122-136. ISBN 978-983-52-0654-2

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Abstract

The advantage of a top-down design flow, specifying design a high abstraction level with less implementation specific details, is that design exploration, where design alternatives easily can be explored, is eased. Besides, there is another important advantage: the task of introducing a design for testability (DFT) method is eased too. This is because the model at high abstraction level includes fewer details and therefore the handling of design and test become easier. DFT is important to reduce the complexity of the test generation for a circuit (Fujiwara, 1985; Abramovici, Breuer, and Friedman, 1990). Various DFT methods have been proposed to augment a given circuit to become more easily testable.

Item Type:Book Section
Subjects:T Technology > T Technology (General)
Divisions:Others
ID Code:31037
Deposited By: Liza Porijo
Deposited On:02 May 2013 04:27
Last Modified:03 Aug 2017 00:45

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