Simulation of 0.18 micron MOSFET and its characterization

Abstract

The research is focused on the development of 0.18µm channel length of nchannel (NMOS) and p-channel (PMOS) enhancement mode MOSFET. Simulation of the process is carried out using Silvaco Athena to modify theoretical values and obtain more accurate process parameters. Non-ideal effect of a MOSFET design such as short channel effects is investigated. The most common effect that generally occurs in the short channel MOSFETs are channel modulation, drain induced barrier lowering (DIBL), punch-through and hot electron effect. Several advanced method such as lightly-doped drain (LDD), halo implant and retrograde well is applied to reduce the short channel effects. At the device simulation process, the electrical parameter is extracted to investigate the device characteristics. Several design analysis are performed to investigate the effectiveness of the advanced method in order to prevent the varying of threshold voltage or short channel effect of a MOSFET device