Temperature and strain-rate dependent damage-based models for lead-free solder interconnects

Abstract

Microelectronic packages with ball grid array (BGA) solder interconnects are subjected to thermomechanical load cycles during fabrication and throughout service life. The lead-free solder joints of BGA respond to both temperature and strain-rate depends on the exposed temperature cycles. Consequently, damage-based models are required for predicting accurately the reliability of the package. The analysis requires temperature and strain-rate dependent properties of the solder alloy and the solder/intermetallic compound (solder/IMC) interfaces. Solder/IMC interfaces of the solder interconnects have a high susceptibility to failure in Sn-4.0Ag-0.5Cu (SAC405) solder joints. The purpose of this research is to establish temperature and strain-rate dependent damage-based models for describing the failure process of solder interconnects. In this study, reliability temperature cycles with high heating and cooling ramps were used to examine the characteristic evolution of stresses and inelastic strains of the solder joints in the BGA package. A 3D finite element model of the BGA package under reflow cooling from 220 to 25 °C and subsequent temperature cycles between 125 to -40 °C was evaluated in predicting the damage initiation, propagation, and solder/IMC interface fracture process of the solder joints. Unified inelastic strain constitutive (Anand) model with optimized model parameters and the cohesive zone model was implemented to predict the creep-viscoplasticity effect of the bulk solder joint and the fracture of brittle solder/IMC interface. It was found that the most critical solder joint is located underneath the silicon die corner with the highest equivalent inelastic strain and von Mises stress under reflow cooling. As expected, the strain rate dependency of the damage model shows a faster inelastic strain rate which is 4 x 10-5 s-1 found in the critical solder joint after three temperature cycles with 900 second dwell time as compared to inelastic strain rate under reflow cooling. The accumulation of inelastic strain is confined to the small edge region at the solder/IMC interface at the board side of the assembly. Damaged location in the bulk solder occurs closer to the edge of the solder/IMC interface throughout the temperature cycles. Based on the parametric study, the higher ramp rate of 370 °C/min has resulted in greater inelastic strain accumulation compared to lower ramp rates of 11 and 22 °C/min in the solder joint with an inelastic strain rate of 1.5 x 10-3 s-1. The validated finite element model with damage-based material response enables the fast generation of reliability data of the solder joints in newly designed BGA packages for competitive time-to-market of the product.