Universiti Teknologi Malaysia Institutional Repository

Graphene floating gate flash memory performance with high-k tunnel barrier engineering

Ahmad, Muhammad Hilman (2020) Graphene floating gate flash memory performance with high-k tunnel barrier engineering. Masters thesis, Universiti Teknologi Malaysia.

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Abstract

In recent years, due to outstanding properties such as durability material, ultrafast electronic performance and ultrasensitive for sensors, graphene has become a demanded material today and in the future due to its remarkable properties. For transistors, the scaling of component sizes has become a bottleneck for silicon-based materials. This study aims to investigate the memory performances of graphene as a charge storage layer in the floating gate with the different type of high-k materials such as silicon nitride (Si3N4), aluminium oxide (AhO3), hafnium oxide (HfO2) and zirconium oxide (ZrO2) using Silvaco ATLAS TCAD tool simulation. The simulation work initially is to validate the experimental work with the simulation data and then determine the performance of the flash memory cell with different type of high-k materials in terms of memory window, program and erase (P/E) characteristics data retention and endurance. Next is to validate in the context of the memory performance trend between the experimental work and the proposed work. The memory window for flash memory cell for silicon dioxide (SiO2) is 15.4 V while for the memory window using variable oxide thickness (VARIOT) of 1/7 nm of SiO2/high-k material of four high-k materials for SiO2/Si3N4, SiO2/AhO3, SiO2/HfO2 and SiO2/ZrO2 tunnel barrier are 23.0 V, 20.0 V, 25.4 V and 26.0 V, respectively at the same P/E voltage of ±20 V programming and erasing voltage. Conventional SiO2 has good data retention but P/E characteristic is better with the introduction of VARIOT. The data retention capability of the four high-k materials is better than that of conventional SiO2, and the data can be retained by 75% (11.6 V) after 10 years of extrapolation with -1/1 V gate stress. For high-k material of SiO2/Si3N4, SiO2/HfO2 and SiO2/ZrO2 tunnel barrier, data are retained by 56% (12.9 V), 47% (11.9 V) and 33% (8 .6 V) while SiO2/AhO3 tunnel barrier with thickness 1/7 nm shows an excellent result among others with 83% (16.6 V) data retained. The endurance performance of the best high-k materials SiO2/AhO3 and SiO2/HfO2 was tested, which showed that the endurance retained 82% and 75% of the charge during 104 P/E cycles, respectively.

Item Type:Thesis (Masters)
Uncontrolled Keywords:ultrafast electronic performance, Silvaco ATLAS TCAD tool simulation
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions:Electrical Engineering
ID Code:101860
Deposited By: Narimah Nawil
Deposited On:13 Jul 2023 01:59
Last Modified:13 Jul 2023 01:59

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