Effect of PWM schemes on the performance and common-mode current of the proposed modified seven-level H-bridge inverter

Abstract

In this paper, modified H-bridge seven-level inverter topology is proposed. The performance of the proposed topology is evaluated in terms of the THD and the fundamental component of the output voltage for open-loop operation and in terms of common mode current for the connected grid system. Implementation feasibility of different PWM techniques and their effect on the performance of the topology has been performed. The PWM switching based on a high frequency is used, as high-frequency PWM technique reduces the THD in the output voltage. The analysis shows that the alternate phase opposite disposition (APOD-PWM) based on a triangular carrier scheme offers the minimum THD of 15.72% for the unity modulation index while operating in an open loop, and in phase disposition (IPD-PWM) triangular carrier scheme offers the minimum common mode current of 222 mA. Also, the output voltage decreases and the fundamental component increases with increment in modulation index is observed. Results obtained show that the topology has low THD as well as common mode current is well within limits for grid-tied applications.