Paraman, Norlina and Yap, Pei Yee (2018) Development of fault simulator on automatic test pattern generation. In: Proceedings of 2018 Electrical Engineering Symposium (EES2018), 2018.
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| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Electrical Engineering |
| ID Code: | 83547 |
| Deposited By: | Narimah Nawil |
| Deposited On: | 30 Sep 2019 13:31 |
| Last Modified: | 20 Oct 2019 05:11 |
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