Estimating time parameters for radar pulse descriptor words using FPGA

Abstract

Electronic warfare (EW) system is an important capability that can advance desired military or, conversely, impede undesired ones. In a military application, EW provides the means to counter, in all battle phases, hostile actions that involve the electromagnetic (EM) spectrum. An electronic support (ES) system is used by the military for intelligence gathering, threat detection, and as a support to electronic attack system. Its main feature is to determine the Pulse Descriptor Words (PDWs) which consists of: 1. Frequency. 2. Time of Arrival (TOA). 3. Pulse Width (PW). 4. Direction of Arrival (DOA). Then, PDW signal will be applied on deinterleaver to determine Pulse Repetition Interval (PRI) and it could be a simple pulse, staggered or jittered pulse. The estimated signal parameters are then used as input to a classifier network to determine the identity of the received signal. This project investigates on the hardware implementation on FPGA (Field Programmable Gate Array) of the time parameters of radar signals after the signal is demodulated. A set of test signals representing different types of radar is first generated which is then used to estimate pulse word descriptors from the time parameters. Using histogram analysis, the estimated pulse word descriptors is then classified with a set of known data base. The performance is evaluated at various signal-to-noise ratio conditions. In this work, 128 clock cycles are used to complete the signal analysing with various values of latency depending on the PRP type. The design is more efficient in term of FPGA resources utilization comparing with previous work. The proposed design can be used for the purpose of auto-measure of time parameters in many EW applications which have physical limitations in size, weight and power consumption (SWaP) such as in an aircraft.