Ibrahim, Izzeldin and Marsono, Muhammad Nadzir and Mat Junos @ Yunus, Siti Aisah (2011) Modelling router hotspots on network-on-chip. In: 13th International Conference On Advanced Communication Technology (ICACT).
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Official URL: http://ieeexplore.ieee.org/document/5745953/
Abstract
A Network-on-Chip (NoC) is a new paradigm in complex System-on-Chip (SoC) designs that provides efficient on-chip communication architecture. It offers scalable communication to SoC and allows decoupling of communication and computation. In NoC, design space exploration is critical due to trade-offs among latency, area, and power consumption. Hence, analytical modeling is an important step for early NoC design. This paper presents a novel top-down approach router model, and utilizes this model for analysis mesh NoC performance measured in terms of throughput, average of queue size, efficiency, loss and waiting time. The model is used also to represent utilization of NoC infrastructure resources.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Uncontrolled Keywords: | Markov processes, System-on-a-chip, Topology, Computational modeling, Throughput, IP networks, Network topology, Router Hotspots, Markov chain, Mesh, Modeling, Network-on-Chip (NoC), Queue, Quality-of-Service (QoS) |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Electrical Engineering |
| ID Code: | 46034 |
| Deposited By: | Haliza Zainal |
| Deposited On: | 10 Jun 2015 03:01 |
| Last Modified: | 17 Jul 2017 01:28 |
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