An embedded cryptosystem implementing symmetric cipher and public-key crypto algorithms in hardware

Abstract

Information security in terms of confidentiality, data integrity, nonrepudiation and authentication is one of the critical aspects in majority of electronic communication and computer networks, especially in high speed security system. This thesis proposes an embedded cryptosystem design prototype, which consist of hybrid encryption cryptosystem and ECC-based digital signature cryptosystem, to provide all of the mentioned security services. The cryptosystem is designed using hardware-software codesign technique. The cryptosystem composes of three components: (a) hardware processing module, (b) device driver and (c) Application Programming Interface (API). This project focused on the bus interface module design of several in-house designed processor cores, which include ECC, RSA, SHA-1 and AES crypto processor core, and LZSS data compression processor core. Besides, a supplementary large integer Modular Arithmetic processor core (MAP), is designed as part of this work. All of these processor cores have been integrated to form a complete cryptosystem in SoPC environment together with Nios main processor and standard peripherals. The embedded device drivers and APIs have been scripted to communicate with each dedicated coprocessor and cryptosystem. The embedded cryptosystem is implemented on an Altera Stratix FPGA prototyping board with an operating system frequency at 40 MHz. An application demonstration prototype and real-time e-document security application has been developed to test the functionality and robustness of the cryptosystem as well as the usability of the embedded device drivers and the APIs. The hybrid encryption cryptosystem offers a performance of 1.80 Mbps in AES crypto subsystem, and able to execute RSA full modular exponentiation operation in just 53 ms. Besides, the ECC-based digital signature cryptosystem can compute the ECDSA signing and verification in a finite field of GF(2163) in 0.59 ms and 1.06 ms, respectively. As the result, this embedded cryptosystem is suitable for next generation real-time IT security.