Ooi, Chia Yee (2003) Object-oriented test pattern generator and logic simulator for combinational circuits. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
Full text not available from this repository.
Official URL: http://libraryopac.utm.my/client/en_AU/main/search...
| Item Type: | Thesis (Masters) |
|---|---|
| Additional Information: | Thesis (Sarjana Kejuruteraan (Elektrik)) - Universiti Teknologi Malaysia, 2003 |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Electrical Engineering |
| ID Code: | 42691 |
| Deposited By: | Haliza Zainal |
| Deposited On: | 02 Nov 2014 03:13 |
| Last Modified: | 06 Oct 2017 08:21 |
Repository Staff Only: item control page
