Universiti Teknologi Malaysia Institutional Repository

An improved asymmetrical multi-level inverter topology with boosted output voltage and reduced components count

Arif, M. S. and Mustafa, U. and Siddique, M. D. and Ahmad, S. and Iqbal, A. and Ashique, R. H. and Ayob, S. (2021) An improved asymmetrical multi-level inverter topology with boosted output voltage and reduced components count. IET Power Electronics, 14 (12). ISSN 1755-4535

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Official URL: http://dx.doi.org/10.1049/pel2.12119

Abstract

This paper presents an improved Multi-level Inverter topology utilizing the concept of boosting-capacitor and two DC sources with reduced switches count for generating 17-level output. The topology employs 10 unidirectional switches including one bidirectional switch. Comparison with other recent topologies shows that the proposed topology employs a reduced number of devices and better performance. The topology combines the modularity of H-Bridge with the boosting capacity of the switched capacitor topology. Special care is taken while designing the switching strategy for voltage balancing of the capacitors. The authors also have generalized the topology to produce ‘n’ level output. Relevant expressions are also formed and reported. Experimental validation, as well as simulation, is performed, and results are verified. Nearest level control is used as the modulation technique.

Item Type:Article
Uncontrolled Keywords:bridge circuits, electric inverters
Subjects:T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions:Electrical Engineering
ID Code:95332
Deposited By: Narimah Nawil
Deposited On:29 Apr 2022 22:21
Last Modified:29 Apr 2022 22:21

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