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Thermal oxidation improvement in semiconductor wafer fabrication

Mahandran, C. J. and Fatah, A. Y. A. and Bani, N. A. and Kaidi, H. M. and Muhtazaruddin, M. N,. and Amran, N. B. (2019) Thermal oxidation improvement in semiconductor wafer fabrication. International Journal of Power Electronics and Drive Systems, 10 (3). pp. 1141-1147. ISSN 2088-8694

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Official URL: http://www.dx.doi.org/10.11591/ijpeds.v10.i3.1141-...

Abstract

Thermal oxidation is a process done to grow a layer of oxide on the surface of a silicon wafer at elevated temperatures to form silicon dioxide. Usually, it en-counters instability in oxide growth and results in variation in the oxide thickness formed. This leads to downtime of furnace and wafer scrap. This study focuses on the factors leading to this phenomenon and finding the optimum settings of these factors. The factors that cause instability to oxide thickness were narrowed down to location of wafer in furnace, oxidation time, gas flow rate and temperature. Characterization and optimization were done using Design of Experiments. Full factorial design was implemented using 4 factors and 2 levels, resulting in 16 runs. Data analysis was done using Multiple Regression Analysis in JMP software. Actual versus predicted plot is examined to determine whether the model fit is significant. Adjusted R2 value was obtained at 99.8% or 0.998 indicating that there is very minimal variation of the data not explained by the model and thus confirming that the model is good. From the effect test, the factors were narrowed down from 4 factors to 3 factors. Location factor was found to have no impact. Significant factors that have impact are gas flow rate, oxidation time and temperature. Analyzing the leverage plots and least square mean plots, temperature was found to have the highest impact on oxide thickness. The model was further analyzed using prediction profiler in JMP to find the optimum settings for thermal oxidation process to meet the target oxide thickness of 8000A. Optimum setting for temperature was found to be at 958 C, gas flow rate at low flow rate (H2:6.5 slm and O2:4.5 slm), oxidation time at 280 min and location of wafers at both zone 1 and zone 2.

Item Type:Article
Uncontrolled Keywords:design of experiments, silicon wafer, thermal oxidation
Subjects:T Technology > T Technology (General)
Divisions:Razak School of Engineering and Advanced Technology
ID Code:88916
Deposited By: Narimah Nawil
Deposited On:29 Dec 2020 04:42
Last Modified:29 Dec 2020 04:42

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