Small Area Implementation for Optically Reconfigurable Gate Array VLSI: FFT Case

Abstract

Optically reconfigurable gate array (ORGA) is a type of multi-context field programmable gate array (FPGA) that has achieved a nanosecond-order reconfiguration capability as well as attaining numerous reconfiguration contexts. Its high-speed dynamic reconfiguration capability is suitable for dynamically changing the function of multi-core processor. ORGA system has high dependability in a radiation rich environment and the development is progressing towards better radiation tolerance. In this paper, size minimization of the ORGA-VLSI is the main concern to maintain its high dependability; hence wire complexity needs special consideration during floor planning. A case of Fast Fourier Transform (FFT) is shown to demonstrate the effectiveness of circuit modification by implementing dynamic reconfiguration for area optimization. Results show that, compared with a normal FFT configuration, the minimum wirelength is reduced 5.5% for a 32-point FFT implementation.