Hadarmard transform and sum of absolute difference improvement on high efficiency video coding using intel advanced vector extension-512

Abstract

High Efficiency Video Coding (HEVC) doubles the data compression ratio compared to previous generation compression technology, Moving Picture Expert Group-Advanced Video Codec (MPEG-AVC/H.264) without sacrificing the image quality. However, this superior compression come at a cost of more computation payload resulting in longer time consumed in encoding and decoding. Hence, the objective of this thesis is to perform vectorization on HEVC data heavy computation algorithm, Hadamard Transform or Sum of Absolute Transform Difference (SATD) and Sum of Absolute Difference (SAD) to achieve optimized compression performance. Single Instruction Multiple Data (SIMD) acceleration will be based on the Intel AVX-512 (Advanced Vector Extension) Instruction Set Architecture (ISA). Since HEVC supports more coding tree block (CTB) sizes, SATD and SAD algorithm eventually become more complex compared to AVC. As a result, SATD and SAD algorithms with various block sizes will be subjected to SIMD acceleration. On the other hand, the second objective is to provide performance evaluation or analysis based on different SIMD ISA and without SIMD implementation on HEVC SATD and SAD. In the end, AVX-512 optimized was performed faster when compared to non optimized SATD and SAD but showed sign of slower in time execution when compared to SSE optimized SATD and SAD.