Ahmad, Syabani (2007) Simulation of single electron transistor (SET) circuits using Monte Carlo method. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
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The very fast switching characteristics and very low power consumption have given the single electron transistor (SET) promising capabilities to replace CMOS transistors in some semiconductor applications. SET theory of operation is now well established nevertheless the transistor is still under laboratory investigations in the fields of fabrication and applications in Large Scale Integration (LSI). Simulation of SET consumes a great deal of computer time, which arises a need to renovate fast and accurate simulation algorithms. This paper presents a simple model for SET circuits, based on the orthodox theory, which calculates carrier transfer rates from source to drain of the transistor by utilizing statistical mechanics. The simulator that is used for this project is MOSES version 1.2 (Monte Carlo Single Electron Transistor Simulator) which has been developed by Ruby Chen in Year 1997. The reason for choosing this program is because it is free and sufficient to simulate SET circuits such as Array, Junction and SET.
|Item Type:||Thesis (Masters)|
|Additional Information:||Thesis (Master of Engineering (Electrical - Electronics and Telecommunication)) - Universiti Teknologi Malaysia, 2007; Supervisor : Prof. Madya Dr. Razali bin Ismail|
|Uncontrolled Keywords:||Single electron transistor (SET), nanoelectronics device, CMOS transistors, Monte Carlo method|
|Subjects:||T Technology > TK Electrical engineering. Electronics Nuclear engineering|
|Deposited By:||Ms Zalinda Shuratman|
|Deposited On:||22 Sep 2008 04:21|
|Last Modified:||27 Sep 2012 06:12|
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