Alias, Nurul Ezaila and Omar, Izzati and Johari, Zaharah (2015) Optimization of 3-D N-channel twin silicon nanowire MOSFET. In: The 41st International Conference On Micro- and Nanofabrication and Manufacturing (MNE2015), 21-24 Sept, 2015, Netherlands.
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Official URL: http://mne2015.org/
Abstract
Abstract—Twin Silicon Nanowire N-channel MOSFET (n-TSNWFET) is an advanced nanotechnology which is believed to be the smallest structure of CMOS devices as well as approaching their downsized limits according to the Moore’s Law. In this work, the optimization of n-channel TSNWFET is described and explored using 3-D simulation. Electrical characteristics such as threshold voltage (Vth), subthreshold swing (SS), and ratio of Ion/Ioff are analyzed. From the results that have obtained, it is proven that better performance of the device in term of Vth, SS and leakage current (Ioff) when varying gate length (Lg), radius of nanowire channel, and gate oxide thickness (tox).
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Uncontrolled Keywords: | twin silicon nanowire, field-effect-transistor (FET) |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Electrical Engineering |
| ID Code: | 62131 |
| Deposited By: | Fazli Masari |
| Deposited On: | 30 May 2017 00:44 |
| Last Modified: | 30 May 2017 00:44 |
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