Rajagopal, R. S. and Di, S. M. and Ooi, C. Y. and Marsono, M. N. (2011) Multi-tap architecture for IP core testing and debugging on network-on-chip. IEEE Region 10 Annual International Conference, Proceedings/TENCON . pp. 697-700. ISSN 1792-4235
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| Item Type: | Article |
|---|---|
| Uncontrolled Keywords: | network-on-chip |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| ID Code: | 45065 |
| Deposited By: | Haliza Zainal |
| Deposited On: | 27 Apr 2015 04:50 |
| Last Modified: | 30 Jul 2017 01:09 |
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