Suleiman, Ishak (2002) Real-time FPGA implementation of baseline JPEG codec processor core. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
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| Item Type: | Thesis (Masters) |
|---|---|
| Additional Information: | Thesis (Sarjana Kejuruteraan (Elektrik)) - Universiti Teknologi Mlaysia, 2002 |
| Subjects: | Q Science > QA Mathematics > QA76 Computer software |
| Divisions: | Electrical Engineering |
| ID Code: | 43086 |
| Deposited By: | Haliza Zainal |
| Deposited On: | 02 Nov 2014 03:24 |
| Last Modified: | 02 Nov 2014 03:24 |
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