Sua, Jia Pao (2010) Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
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| Item Type: | Thesis (Masters) |
|---|---|
| Additional Information: | Thesis (Sarjana Kejuruteraan (Elektrik - Elektronik dan Telekomunikasi)) - Universiti Teknologi Malaysia, 2010; Supervisor : Dr. Ooi Chia Yee |
| Subjects: | Facultiy/Division > Electrical Engineering T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Electrical Engineering |
| ID Code: | 26927 |
| Deposited By: | Kamariah Mohamed Jong |
| Deposited On: | 02 Aug 2012 08:31 |
| Last Modified: | 02 Aug 2012 08:31 |
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