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VLSI design of a neural network computational engine ASIC microch

Rajah, Avinash (2004) VLSI design of a neural network computational engine ASIC microch. In: IEEE Intenational Conference on Semiconductor Electronics, 2004, Kuala Lumpur.

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Item Type:Conference or Workshop Item (Paper)
Subjects:Unspecified
Divisions:Others
ID Code:20694
Deposited By: Liza Porijo
Last Modified:28 Dec 2011 15:56

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