Wan Yussof, Wan Juwairiah (2007) Simulation model for analysis and design of printed circuit board production line. Masters thesis, Universiti Teknologi Malaysia, Faculty of Computer Science and Information System.
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| Item Type: | Thesis (Masters) |
|---|---|
| Additional Information: | Thesis (Sarjana Sains (Teknologi Maklumat - Pembuatan)) - Universiti Teknologi Malaysia, 2007; Supervisor: Mohammad Ishak Desa |
| Subjects: | Q Science > QA Mathematics > QA75 Electronic computers. Computer science |
| Divisions: | Computer Science and Information System |
| ID Code: | 11843 |
| Deposited By: | Kamariah Mohamed Jong |
| Deposited On: | 28 Nov 2013 09:56 |
| Last Modified: | 30 Nov 2013 12:25 |
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